stm32: Implement armcm_main() in arch specific code

Move armcm_main() to stm32f0.c, stm32f1.c, and stm32f4.c.  This gives
the arch specific code more control on the early boot setup.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor 2019-10-24 11:35:18 -04:00
parent faeaa54925
commit 9a11286327
6 changed files with 40 additions and 30 deletions

View file

@ -9,6 +9,7 @@
#include "board/irq.h" // irq_disable
#include "board/usb_cdc.h" // usb_request_bootloader
#include "internal.h" // enable_pclock
#include "sched.h" // sched_main
#define FREQ_PERIPH (CONFIG_CLOCK_FREQ / 2)
@ -123,12 +124,9 @@ usb_request_bootloader(void)
}
// Main clock setup called at chip startup
void
static void
clock_setup(void)
{
// The SystemInit() code alters VTOR - restore it
SCB->VTOR = (uint32_t)VectorTable;
// Configure and enable PLL
uint32_t cfgr;
if (CONFIG_CLOCK_REF_8M) {
@ -157,8 +155,22 @@ clock_setup(void)
RCC->CFGR = cfgr | RCC_CFGR_SW_PLL;
while ((RCC->CFGR & RCC_CFGR_SWS_Msk) != RCC_CFGR_SWS_PLL)
;
}
// Main entry point - called from armcm_boot.c:ResetHandler()
void
armcm_main(void)
{
// Run SystemInit() and then restore VTOR
SystemInit();
SCB->VTOR = (uint32_t)VectorTable;
// Setup clocks
clock_setup();
// Disable JTAG to free PA15, PB3, PB4
enable_pclock(AFIO_BASE);
AFIO->MAPR = AFIO_MAPR_SWJ_CFG_JTAGDISABLE;
sched_main();
}