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lib: Add Atmel SAM E70 headers
Signed-off-by: Alex Maclean <monkeh@monkeh.net>
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lib/same70b/include/component/utmi.h
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lib/same70b/include/component/utmi.h
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/**
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* \file
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*
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* \brief Component description for UTMI
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*
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* Copyright (c) 2019 Microchip Technology Inc.
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*
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* \license_start
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*
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* \page License
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* \license_stop
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*
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*/
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/* file generated from device description version 2019-01-18T21:19:59Z */
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#ifndef _SAME70_UTMI_COMPONENT_H_
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#define _SAME70_UTMI_COMPONENT_H_
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#define _SAME70_UTMI_COMPONENT_ /**< \deprecated Backward compatibility for ASF */
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/** \addtogroup SAME_SAME70 USB Transmitter Interface Macrocell
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* @{
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*/
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/* ========================================================================== */
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/** SOFTWARE API DEFINITION FOR UTMI */
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/* ========================================================================== */
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#ifndef COMPONENT_TYPEDEF_STYLE
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#define COMPONENT_TYPEDEF_STYLE 'R' /**< Defines default style of typedefs for the component header files ('R' = RFO, 'N' = NTO)*/
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#endif
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#define UTMI_11300 /**< (UTMI) Module ID */
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#define REV_UTMI A /**< (UTMI) Module revision */
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/* -------- UTMI_OHCIICR : (UTMI Offset: 0x10) (R/W 32) OHCI Interrupt Configuration Register -------- */
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#if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
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#if COMPONENT_TYPEDEF_STYLE == 'N'
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typedef union {
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struct {
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uint32_t RES0:1; /**< bit: 0 USB PORTx Reset */
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uint32_t :3; /**< bit: 1..3 Reserved */
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uint32_t ARIE:1; /**< bit: 4 OHCI Asynchronous Resume Interrupt Enable */
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uint32_t APPSTART:1; /**< bit: 5 Reserved */
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uint32_t :17; /**< bit: 6..22 Reserved */
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uint32_t UDPPUDIS:1; /**< bit: 23 USB Device Pull-up Disable */
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uint32_t :8; /**< bit: 24..31 Reserved */
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} bit; /**< Structure used for bit access */
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struct {
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uint32_t RES:1; /**< bit: 0 USB PORTx Reset */
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uint32_t :31; /**< bit: 1..31 Reserved */
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} vec; /**< Structure used for vec access */
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uint32_t reg; /**< Type used for register access */
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} UTMI_OHCIICR_Type;
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#endif
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#endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
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#define UTMI_OHCIICR_OFFSET (0x10) /**< (UTMI_OHCIICR) OHCI Interrupt Configuration Register Offset */
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#define UTMI_OHCIICR_RES0_Pos 0 /**< (UTMI_OHCIICR) USB PORTx Reset Position */
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#define UTMI_OHCIICR_RES0_Msk (_U_(0x1) << UTMI_OHCIICR_RES0_Pos) /**< (UTMI_OHCIICR) USB PORTx Reset Mask */
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#define UTMI_OHCIICR_RES0 UTMI_OHCIICR_RES0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use UTMI_OHCIICR_RES0_Msk instead */
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#define UTMI_OHCIICR_ARIE_Pos 4 /**< (UTMI_OHCIICR) OHCI Asynchronous Resume Interrupt Enable Position */
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#define UTMI_OHCIICR_ARIE_Msk (_U_(0x1) << UTMI_OHCIICR_ARIE_Pos) /**< (UTMI_OHCIICR) OHCI Asynchronous Resume Interrupt Enable Mask */
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#define UTMI_OHCIICR_ARIE UTMI_OHCIICR_ARIE_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use UTMI_OHCIICR_ARIE_Msk instead */
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#define UTMI_OHCIICR_APPSTART_Pos 5 /**< (UTMI_OHCIICR) Reserved Position */
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#define UTMI_OHCIICR_APPSTART_Msk (_U_(0x1) << UTMI_OHCIICR_APPSTART_Pos) /**< (UTMI_OHCIICR) Reserved Mask */
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#define UTMI_OHCIICR_APPSTART UTMI_OHCIICR_APPSTART_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use UTMI_OHCIICR_APPSTART_Msk instead */
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#define UTMI_OHCIICR_UDPPUDIS_Pos 23 /**< (UTMI_OHCIICR) USB Device Pull-up Disable Position */
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#define UTMI_OHCIICR_UDPPUDIS_Msk (_U_(0x1) << UTMI_OHCIICR_UDPPUDIS_Pos) /**< (UTMI_OHCIICR) USB Device Pull-up Disable Mask */
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#define UTMI_OHCIICR_UDPPUDIS UTMI_OHCIICR_UDPPUDIS_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use UTMI_OHCIICR_UDPPUDIS_Msk instead */
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#define UTMI_OHCIICR_MASK _U_(0x800031) /**< \deprecated (UTMI_OHCIICR) Register MASK (Use UTMI_OHCIICR_Msk instead) */
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#define UTMI_OHCIICR_Msk _U_(0x800031) /**< (UTMI_OHCIICR) Register Mask */
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#define UTMI_OHCIICR_RES_Pos 0 /**< (UTMI_OHCIICR Position) USB PORTx Reset */
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#define UTMI_OHCIICR_RES_Msk (_U_(0x1) << UTMI_OHCIICR_RES_Pos) /**< (UTMI_OHCIICR Mask) RES */
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#define UTMI_OHCIICR_RES(value) (UTMI_OHCIICR_RES_Msk & ((value) << UTMI_OHCIICR_RES_Pos))
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/* -------- UTMI_CKTRIM : (UTMI Offset: 0x30) (R/W 32) UTMI Clock Trimming Register -------- */
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#if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
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#if COMPONENT_TYPEDEF_STYLE == 'N'
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typedef union {
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struct {
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uint32_t FREQ:2; /**< bit: 0..1 UTMI Reference Clock Frequency */
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uint32_t :30; /**< bit: 2..31 Reserved */
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} bit; /**< Structure used for bit access */
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uint32_t reg; /**< Type used for register access */
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} UTMI_CKTRIM_Type;
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#endif
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#endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
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#define UTMI_CKTRIM_OFFSET (0x30) /**< (UTMI_CKTRIM) UTMI Clock Trimming Register Offset */
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#define UTMI_CKTRIM_FREQ_Pos 0 /**< (UTMI_CKTRIM) UTMI Reference Clock Frequency Position */
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#define UTMI_CKTRIM_FREQ_Msk (_U_(0x3) << UTMI_CKTRIM_FREQ_Pos) /**< (UTMI_CKTRIM) UTMI Reference Clock Frequency Mask */
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#define UTMI_CKTRIM_FREQ(value) (UTMI_CKTRIM_FREQ_Msk & ((value) << UTMI_CKTRIM_FREQ_Pos))
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#define UTMI_CKTRIM_FREQ_XTAL12_Val _U_(0x0) /**< (UTMI_CKTRIM) 12 MHz reference clock */
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#define UTMI_CKTRIM_FREQ_XTAL16_Val _U_(0x1) /**< (UTMI_CKTRIM) 16 MHz reference clock */
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#define UTMI_CKTRIM_FREQ_XTAL12 (UTMI_CKTRIM_FREQ_XTAL12_Val << UTMI_CKTRIM_FREQ_Pos) /**< (UTMI_CKTRIM) 12 MHz reference clock Position */
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#define UTMI_CKTRIM_FREQ_XTAL16 (UTMI_CKTRIM_FREQ_XTAL16_Val << UTMI_CKTRIM_FREQ_Pos) /**< (UTMI_CKTRIM) 16 MHz reference clock Position */
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#define UTMI_CKTRIM_MASK _U_(0x03) /**< \deprecated (UTMI_CKTRIM) Register MASK (Use UTMI_CKTRIM_Msk instead) */
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#define UTMI_CKTRIM_Msk _U_(0x03) /**< (UTMI_CKTRIM) Register Mask */
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#if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
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#if COMPONENT_TYPEDEF_STYLE == 'R'
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/** \brief UTMI hardware registers */
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typedef struct {
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__I uint8_t Reserved1[16];
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__IO uint32_t UTMI_OHCIICR; /**< (UTMI Offset: 0x10) OHCI Interrupt Configuration Register */
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__I uint8_t Reserved2[28];
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__IO uint32_t UTMI_CKTRIM; /**< (UTMI Offset: 0x30) UTMI Clock Trimming Register */
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} Utmi;
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#elif COMPONENT_TYPEDEF_STYLE == 'N'
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/** \brief UTMI hardware registers */
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typedef struct {
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__I uint8_t Reserved1[16];
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__IO UTMI_OHCIICR_Type UTMI_OHCIICR; /**< Offset: 0x10 (R/W 32) OHCI Interrupt Configuration Register */
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__I uint8_t Reserved2[28];
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__IO UTMI_CKTRIM_Type UTMI_CKTRIM; /**< Offset: 0x30 (R/W 32) UTMI Clock Trimming Register */
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} Utmi;
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#else /* COMPONENT_TYPEDEF_STYLE */
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#error Unknown component typedef style
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#endif /* COMPONENT_TYPEDEF_STYLE */
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#endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
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/** @} end of USB Transmitter Interface Macrocell */
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#endif /* _SAME70_UTMI_COMPONENT_H_ */
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