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Add STM32F103 port
Add a fully functional STM32F1 port, currently mostly targeting STM32F103 microcontrollers. This requires an 8 MHz XTAL. The maximum possible step rate is around 282K steps per second. This uses stm32flash to burn the firmware. The bootloader needs to be started by setting BOOT0 to 1 and resetting the MCU. There is no automatic bootloader, unlike on Arduino. Signed-off-by: Grigori Goronzy <greg@kinoho.net>
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Grigori Goronzy
KevinOConnor
parent
e097b08520
commit
75d5737211
173 changed files with 267435 additions and 0 deletions
324
lib/hal-stm32f1/include/stm32f1xx_hal_dac.h
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324
lib/hal-stm32f1/include/stm32f1xx_hal_dac.h
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/**
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******************************************************************************
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* @file stm32f1xx_hal_dac.h
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* @author MCD Application Team
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* @version V1.1.1
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* @date 12-May-2017
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* @brief Header file of DAC HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F1xx_HAL_DAC_H
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#define __STM32F1xx_HAL_DAC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f1xx_hal_def.h"
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/** @addtogroup STM32F1xx_HAL_Driver
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* @{
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*/
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/** @addtogroup DAC
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup DAC_Exported_Types DAC Exported Types
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* @{
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*/
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/**
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* @brief HAL State structures definition
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*/
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typedef enum
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{
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HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */
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HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */
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HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */
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HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */
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HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */
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}HAL_DAC_StateTypeDef;
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/**
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* @brief DAC handle Structure definition
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*/
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typedef struct
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{
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DAC_TypeDef *Instance; /*!< Register base address */
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__IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
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HAL_LockTypeDef Lock; /*!< DAC locking object */
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DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
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DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
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__IO uint32_t ErrorCode; /*!< DAC Error code */
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}DAC_HandleTypeDef;
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/**
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* @brief DAC Configuration regular Channel structure definition
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*/
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typedef struct
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{
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uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
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This parameter can be a value of @ref DACEx_trigger_selection
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Note: For STM32F100x high-density value line devices, additional trigger sources are available. */
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uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
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This parameter can be a value of @ref DAC_output_buffer */
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}DAC_ChannelConfTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup DAC_Exported_Constants DAC Exported Constants
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* @{
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*/
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/** @defgroup DAC_Error_Code DAC Error Code
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* @{
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*/
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#define HAL_DAC_ERROR_NONE 0x00000000U /*!< No error */
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#define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x00000001U /*!< DAC channel1 DMA underrun error */
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#define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x00000002U /*!< DAC channel2 DMA underrun error */
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#define HAL_DAC_ERROR_DMA 0x00000004U /*!< DMA error */
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/**
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* @}
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*/
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/** @defgroup DAC_output_buffer DAC output buffer
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* @{
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*/
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#define DAC_OUTPUTBUFFER_ENABLE 0x00000000U
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#define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1)
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/**
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* @}
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*/
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/** @defgroup DAC_Channel_selection DAC Channel selection
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* @{
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*/
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#define DAC_CHANNEL_1 0x00000000U
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#define DAC_CHANNEL_2 0x00000010U
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/**
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* @}
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*/
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/** @defgroup DAC_data_alignement DAC data alignement
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* @{
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*/
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#define DAC_ALIGN_12B_R 0x00000000U
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#define DAC_ALIGN_12B_L 0x00000004U
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#define DAC_ALIGN_8B_R 0x00000008U
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @defgroup DAC_Exported_Macros DAC Exported Macros
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* @{
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*/
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/** @brief Reset DAC handle state
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* @param __HANDLE__: specifies the DAC handle.
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* @retval None
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*/
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#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
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/** @brief Enable the DAC channel
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* @param __HANDLE__: specifies the DAC handle.
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* @param __DAC_Channel__: specifies the DAC channel
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* @retval None
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*/
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#define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \
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((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__)))
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/** @brief Disable the DAC channel
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* @param __HANDLE__: specifies the DAC handle
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* @param __DAC_Channel__: specifies the DAC channel.
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* @retval None
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*/
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#define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \
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((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__)))
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/**
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* @}
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*/
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/* Private macro -------------------------------------------------------------*/
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/** @defgroup DAC_Private_Macros DAC Private Macros
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* @{
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*/
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#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
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((STATE) == DAC_OUTPUTBUFFER_DISABLE))
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#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
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((CHANNEL) == DAC_CHANNEL_2))
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#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
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((ALIGN) == DAC_ALIGN_12B_L) || \
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((ALIGN) == DAC_ALIGN_8B_R))
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#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U)
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#define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008U + (__ALIGNMENT__))
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#define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014U + (__ALIGNMENT__))
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#define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020U + (__ALIGNMENT__))
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/**
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* @}
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*/
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/* Include DAC HAL Extension module */
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#include "stm32f1xx_hal_dac_ex.h"
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup DAC_Exported_Functions
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* @{
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*/
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/** @addtogroup DAC_Exported_Functions_Group1
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* @{
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*/
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/* Initialization and de-initialization functions *****************************/
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HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac);
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HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac);
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void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac);
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void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac);
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/**
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* @}
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*/
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/** @addtogroup DAC_Exported_Functions_Group2
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* @{
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*/
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/* IO operation functions *****************************************************/
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HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel);
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HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel);
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HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment);
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HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel);
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HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
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uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel);
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/**
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* @}
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*/
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/** @addtogroup DAC_Exported_Functions_Group3
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* @{
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*/
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/* Peripheral Control functions ***********************************************/
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HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel);
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/**
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* @}
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*/
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/** @addtogroup DAC_Exported_Functions_Group4
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* @{
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*/
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/* Peripheral State functions *************************************************/
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HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac);
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uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
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void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac);
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void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
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void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/** @addtogroup DAC_Private_Functions DAC Private Functions
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* @{
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*/
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void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
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void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
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void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif /* STM32F100xB || STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
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#ifdef __cplusplus
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}
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#endif
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#endif /*__STM32F1xx_HAL_DAC_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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