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lib: Add stm32f0 hal and cmsis files
Signed-off-by: Eugene Krashtan <Eugene.Krashtan@opensynergy.com> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor
parent
154823cc8f
commit
74c6a85cde
161 changed files with 258859 additions and 0 deletions
905
lib/hal-stm32f0/source/stm32f0xx_hal_dma.c
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lib/hal-stm32f0/source/stm32f0xx_hal_dma.c
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/**
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******************************************************************************
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* @file stm32f0xx_hal_dma.c
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* @author MCD Application Team
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* @brief DMA HAL module driver.
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*
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* This file provides firmware functions to manage the following
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* functionalities of the Direct Memory Access (DMA) peripheral:
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* + Initialization and de-initialization functions
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* + IO operation functions
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* + Peripheral State and errors functions
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@verbatim
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==============================================================================
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##### How to use this driver #####
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==============================================================================
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[..]
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(#) Enable and configure the peripheral to be connected to the DMA Channel
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(except for internal SRAM / FLASH memories: no initialization is
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necessary). Please refer to Reference manual for connection between peripherals
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and DMA requests .
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(#) For a given Channel, program the required configuration through the following parameters:
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Transfer Direction, Source and Destination data formats,
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Circular or Normal mode, Channel Priority level, Source and Destination Increment mode,
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using HAL_DMA_Init() function.
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(#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
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detection.
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(#) Use HAL_DMA_Abort() function to abort the current transfer
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-@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
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*** Polling mode IO operation ***
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=================================
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[..]
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(+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
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address and destination address and the Length of data to be transferred
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(+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
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case a fixed Timeout can be configured by User depending from his application.
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*** Interrupt mode IO operation ***
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===================================
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[..]
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(+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
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(+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
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(+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
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Source address and destination address and the Length of data to be transferred.
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In this case the DMA interrupt is configured
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(+) Use HAL_DMA_Channel_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
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(+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
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add his own function by customization of function pointer XferCpltCallback and
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XferErrorCallback (i.e a member of DMA handle structure).
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*** DMA HAL driver macros list ***
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=============================================
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[..]
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Below the list of most used macros in DMA HAL driver.
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[..]
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(@) You can refer to the DMA HAL driver header file for more useful macros
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@endverbatim
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f0xx_hal.h"
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/** @addtogroup STM32F0xx_HAL_Driver
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* @{
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*/
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/** @defgroup DMA DMA
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* @brief DMA HAL module driver
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* @{
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*/
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#ifdef HAL_DMA_MODULE_ENABLED
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/** @defgroup DMA_Private_Functions DMA Private Functions
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* @{
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*/
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static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
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static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma);
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/**
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* @}
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*/
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/* Exported functions ---------------------------------------------------------*/
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/** @defgroup DMA_Exported_Functions DMA Exported Functions
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* @{
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*/
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/** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
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* @brief Initialization and de-initialization functions
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*
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@verbatim
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===============================================================================
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##### Initialization and de-initialization functions #####
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===============================================================================
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[..]
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This section provides functions allowing to initialize the DMA Channel source
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and destination addresses, incrementation and data sizes, transfer direction,
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circular/normal mode selection, memory-to-memory mode selection and Channel priority value.
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[..]
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The HAL_DMA_Init() function follows the DMA configuration procedures as described in
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reference manual.
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@endverbatim
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* @{
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*/
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/**
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* @brief Initialize the DMA according to the specified
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* parameters in the DMA_InitTypeDef and initialize the associated handle.
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* @param hdma Pointer to a DMA_HandleTypeDef structure that contains
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* the configuration information for the specified DMA Channel.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
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{
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uint32_t tmp = 0U;
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/* Check the DMA handle allocation */
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if(NULL == hdma)
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{
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return HAL_ERROR;
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}
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/* Check the parameters */
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assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
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assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
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assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
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assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
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assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
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assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
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assert_param(IS_DMA_MODE(hdma->Init.Mode));
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assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
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/* Change DMA peripheral state */
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hdma->State = HAL_DMA_STATE_BUSY;
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/* Get the CR register value */
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tmp = hdma->Instance->CCR;
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/* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */
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tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
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DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
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DMA_CCR_DIR));
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/* Prepare the DMA Channel configuration */
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tmp |= hdma->Init.Direction |
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hdma->Init.PeriphInc | hdma->Init.MemInc |
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hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
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hdma->Init.Mode | hdma->Init.Priority;
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/* Write to DMA Channel CR register */
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hdma->Instance->CCR = tmp;
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/* Initialize DmaBaseAddress and ChannelIndex parameters used
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by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
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DMA_CalcBaseAndBitshift(hdma);
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/* Clean callbacks */
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hdma->XferCpltCallback = NULL;
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hdma->XferHalfCpltCallback = NULL;
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hdma->XferErrorCallback = NULL;
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hdma->XferAbortCallback = NULL;
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/* Initialise the error code */
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hdma->ErrorCode = HAL_DMA_ERROR_NONE;
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/* Initialize the DMA state*/
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hdma->State = HAL_DMA_STATE_READY;
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/* Allocate lock resource and initialize it */
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hdma->Lock = HAL_UNLOCKED;
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return HAL_OK;
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}
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/**
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* @brief DeInitialize the DMA peripheral
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* @param hdma pointer to a DMA_HandleTypeDef structure that contains
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* the configuration information for the specified DMA Channel.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
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{
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/* Check the DMA handle allocation */
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if(NULL == hdma)
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{
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return HAL_ERROR;
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}
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/* Check the parameters */
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assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
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/* Disable the selected DMA Channelx */
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hdma->Instance->CCR &= ~DMA_CCR_EN;
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/* Reset DMA Channel control register */
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hdma->Instance->CCR = 0U;
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/* Reset DMA Channel Number of Data to Transfer register */
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hdma->Instance->CNDTR = 0U;
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/* Reset DMA Channel peripheral address register */
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hdma->Instance->CPAR = 0U;
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/* Reset DMA Channel memory address register */
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hdma->Instance->CMAR = 0U;
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/* Get DMA Base Address */
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DMA_CalcBaseAndBitshift(hdma);
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/* Clear all flags */
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hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex;
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/* Initialize the error code */
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hdma->ErrorCode = HAL_DMA_ERROR_NONE;
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/* Initialize the DMA state */
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hdma->State = HAL_DMA_STATE_RESET;
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/* Release Lock */
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__HAL_UNLOCK(hdma);
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return HAL_OK;
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}
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/**
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* @}
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*/
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/** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions
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* @brief I/O operation functions
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*
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@verbatim
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===============================================================================
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##### IO operation functions #####
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===============================================================================
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[..] This section provides functions allowing to:
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(+) Configure the source, destination address and data length and Start DMA transfer
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(+) Configure the source, destination address and data length and
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Start DMA transfer with interrupt
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(+) Abort DMA transfer
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(+) Poll for transfer complete
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(+) Handle DMA interrupt request
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@endverbatim
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* @{
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*/
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/**
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* @brief Start the DMA Transfer.
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* @param hdma pointer to a DMA_HandleTypeDef structure that contains
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* the configuration information for the specified DMA Channel.
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* @param SrcAddress The source memory Buffer address
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* @param DstAddress The destination memory Buffer address
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* @param DataLength The length of data to be transferred from source to destination
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
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{
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HAL_StatusTypeDef status = HAL_OK;
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/* Check the parameters */
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assert_param(IS_DMA_BUFFER_SIZE(DataLength));
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/* Process locked */
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__HAL_LOCK(hdma);
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if(HAL_DMA_STATE_READY == hdma->State)
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{
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/* Change DMA peripheral state */
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hdma->State = HAL_DMA_STATE_BUSY;
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hdma->ErrorCode = HAL_DMA_ERROR_NONE;
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/* Disable the peripheral */
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hdma->Instance->CCR &= ~DMA_CCR_EN;
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/* Configure the source, destination address and the data length */
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DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
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/* Enable the Peripheral */
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hdma->Instance->CCR |= DMA_CCR_EN;
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}
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else
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{
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/* Process Unlocked */
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__HAL_UNLOCK(hdma);
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/* Remain BUSY */
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status = HAL_BUSY;
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}
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return status;
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}
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/**
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* @brief Start the DMA Transfer with interrupt enabled.
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* @param hdma pointer to a DMA_HandleTypeDef structure that contains
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* the configuration information for the specified DMA Channel.
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* @param SrcAddress The source memory Buffer address
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* @param DstAddress The destination memory Buffer address
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* @param DataLength The length of data to be transferred from source to destination
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
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{
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HAL_StatusTypeDef status = HAL_OK;
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/* Check the parameters */
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assert_param(IS_DMA_BUFFER_SIZE(DataLength));
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/* Process locked */
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__HAL_LOCK(hdma);
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if(HAL_DMA_STATE_READY == hdma->State)
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{
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/* Change DMA peripheral state */
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hdma->State = HAL_DMA_STATE_BUSY;
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hdma->ErrorCode = HAL_DMA_ERROR_NONE;
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/* Disable the peripheral */
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hdma->Instance->CCR &= ~DMA_CCR_EN;
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/* Configure the source, destination address and the data length */
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DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
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/* Enable the transfer complete, & transfer error interrupts */
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/* Half transfer interrupt is optional: enable it only if associated callback is available */
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if(NULL != hdma->XferHalfCpltCallback )
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{
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hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE);
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}
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else
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{
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hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_TE);
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hdma->Instance->CCR &= ~DMA_IT_HT;
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}
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/* Enable the Peripheral */
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hdma->Instance->CCR |= DMA_CCR_EN;
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}
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else
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{
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/* Process Unlocked */
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__HAL_UNLOCK(hdma);
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/* Remain BUSY */
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status = HAL_BUSY;
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}
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return status;
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}
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/**
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* @brief Abort the DMA Transfer.
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* @param hdma pointer to a DMA_HandleTypeDef structure that contains
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* the configuration information for the specified DMA Channel.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
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{
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/* Disable DMA IT */
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hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE);
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/* Disable the channel */
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hdma->Instance->CCR &= ~DMA_CCR_EN;
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/* Clear all flags */
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hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex);
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/* Change the DMA state*/
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hdma->State = HAL_DMA_STATE_READY;
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/* Process Unlocked */
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__HAL_UNLOCK(hdma);
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return HAL_OK;
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}
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/**
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* @brief Abort the DMA Transfer in Interrupt mode.
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* @param hdma pointer to a DMA_HandleTypeDef structure that contains
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* the configuration information for the specified DMA Stream.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
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{
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HAL_StatusTypeDef status = HAL_OK;
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if(HAL_DMA_STATE_BUSY != hdma->State)
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{
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/* no transfer ongoing */
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hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
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status = HAL_ERROR;
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}
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else
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{
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/* Disable DMA IT */
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hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE);
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/* Disable the channel */
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hdma->Instance->CCR &= ~DMA_CCR_EN;
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/* Clear all flags */
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hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex;
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/* Change the DMA state */
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hdma->State = HAL_DMA_STATE_READY;
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/* Process Unlocked */
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__HAL_UNLOCK(hdma);
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/* Call User Abort callback */
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if(hdma->XferAbortCallback != NULL)
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{
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hdma->XferAbortCallback(hdma);
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}
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}
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return status;
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}
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/**
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* @brief Polling for transfer complete.
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* @param hdma pointer to a DMA_HandleTypeDef structure that contains
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* the configuration information for the specified DMA Channel.
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* @param CompleteLevel Specifies the DMA level complete.
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* @param Timeout Timeout duration.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
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{
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uint32_t temp;
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uint32_t tickstart = 0U;
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if(HAL_DMA_STATE_BUSY != hdma->State)
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{
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/* no transfer ongoing */
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hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
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__HAL_UNLOCK(hdma);
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return HAL_ERROR;
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}
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/* Polling mode not supported in circular mode */
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if (RESET != (hdma->Instance->CCR & DMA_CCR_CIRC))
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{
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||||
hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Get the level transfer complete flag */
|
||||
if(HAL_DMA_FULL_TRANSFER == CompleteLevel)
|
||||
{
|
||||
/* Transfer Complete flag */
|
||||
temp = DMA_FLAG_TC1 << hdma->ChannelIndex;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Half Transfer Complete flag */
|
||||
temp = DMA_FLAG_HT1 << hdma->ChannelIndex;
|
||||
}
|
||||
|
||||
/* Get tick */
|
||||
tickstart = HAL_GetTick();
|
||||
|
||||
while(RESET == (hdma->DmaBaseAddress->ISR & temp))
|
||||
{
|
||||
if(RESET != (hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << hdma->ChannelIndex)))
|
||||
{
|
||||
/* When a DMA transfer error occurs */
|
||||
/* A hardware clear of its EN bits is performed */
|
||||
/* Clear all flags */
|
||||
hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex;
|
||||
|
||||
/* Update error code */
|
||||
hdma->ErrorCode = HAL_DMA_ERROR_TE;
|
||||
|
||||
/* Change the DMA state */
|
||||
hdma->State= HAL_DMA_STATE_READY;
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hdma);
|
||||
|
||||
return HAL_ERROR;
|
||||
}
|
||||
/* Check for the Timeout */
|
||||
if(Timeout != HAL_MAX_DELAY)
|
||||
{
|
||||
if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
|
||||
{
|
||||
/* Update error code */
|
||||
hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
|
||||
|
||||
/* Change the DMA state */
|
||||
hdma->State = HAL_DMA_STATE_READY;
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hdma);
|
||||
|
||||
return HAL_ERROR;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if(HAL_DMA_FULL_TRANSFER == CompleteLevel)
|
||||
{
|
||||
/* Clear the transfer complete flag */
|
||||
hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex;
|
||||
|
||||
/* The selected Channelx EN bit is cleared (DMA is disabled and
|
||||
all transfers are complete) */
|
||||
hdma->State = HAL_DMA_STATE_READY;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Clear the half transfer complete flag */
|
||||
hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex;
|
||||
}
|
||||
|
||||
/* Process unlocked */
|
||||
__HAL_UNLOCK(hdma);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Handle DMA interrupt request.
|
||||
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA Channel.
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
uint32_t flag_it = hdma->DmaBaseAddress->ISR;
|
||||
uint32_t source_it = hdma->Instance->CCR;
|
||||
|
||||
/* Half Transfer Complete Interrupt management ******************************/
|
||||
if ((RESET != (flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_HT)))
|
||||
{
|
||||
/* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
|
||||
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
|
||||
{
|
||||
/* Disable the half transfer interrupt */
|
||||
hdma->Instance->CCR &= ~DMA_IT_HT;
|
||||
}
|
||||
|
||||
/* Clear the half transfer complete flag */
|
||||
hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex;
|
||||
|
||||
/* DMA peripheral state is not updated in Half Transfer */
|
||||
/* State is updated only in Transfer Complete case */
|
||||
|
||||
if(hdma->XferHalfCpltCallback != NULL)
|
||||
{
|
||||
/* Half transfer callback */
|
||||
hdma->XferHalfCpltCallback(hdma);
|
||||
}
|
||||
}
|
||||
|
||||
/* Transfer Complete Interrupt management ***********************************/
|
||||
else if ((RESET != (flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TC)))
|
||||
{
|
||||
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
|
||||
{
|
||||
/* Disable the transfer complete & transfer error interrupts */
|
||||
/* if the DMA mode is not CIRCULAR */
|
||||
hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_TE);
|
||||
|
||||
/* Change the DMA state */
|
||||
hdma->State = HAL_DMA_STATE_READY;
|
||||
}
|
||||
|
||||
/* Clear the transfer complete flag */
|
||||
hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex;
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hdma);
|
||||
|
||||
if(hdma->XferCpltCallback != NULL)
|
||||
{
|
||||
/* Transfer complete callback */
|
||||
hdma->XferCpltCallback(hdma);
|
||||
}
|
||||
}
|
||||
|
||||
/* Transfer Error Interrupt management ***************************************/
|
||||
else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
|
||||
{
|
||||
/* When a DMA transfer error occurs */
|
||||
/* A hardware clear of its EN bits is performed */
|
||||
/* Then, disable all DMA interrupts */
|
||||
hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE);
|
||||
|
||||
/* Clear all flags */
|
||||
hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex;
|
||||
|
||||
/* Update error code */
|
||||
hdma->ErrorCode = HAL_DMA_ERROR_TE;
|
||||
|
||||
/* Change the DMA state */
|
||||
hdma->State = HAL_DMA_STATE_READY;
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hdma);
|
||||
|
||||
if(hdma->XferErrorCallback != NULL)
|
||||
{
|
||||
/* Transfer error callback */
|
||||
hdma->XferErrorCallback(hdma);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Register callbacks
|
||||
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA Stream.
|
||||
* @param CallbackID User Callback identifer
|
||||
* a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
|
||||
* @param pCallback pointer to private callback function which has pointer to
|
||||
* a DMA_HandleTypeDef structure as parameter.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma))
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Process locked */
|
||||
__HAL_LOCK(hdma);
|
||||
|
||||
if(HAL_DMA_STATE_READY == hdma->State)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_DMA_XFER_CPLT_CB_ID:
|
||||
hdma->XferCpltCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_DMA_XFER_HALFCPLT_CB_ID:
|
||||
hdma->XferHalfCpltCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_DMA_XFER_ERROR_CB_ID:
|
||||
hdma->XferErrorCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_DMA_XFER_ABORT_CB_ID:
|
||||
hdma->XferAbortCallback = pCallback;
|
||||
break;
|
||||
|
||||
default:
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Release Lock */
|
||||
__HAL_UNLOCK(hdma);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UnRegister callbacks
|
||||
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA Stream.
|
||||
* @param CallbackID User Callback identifer
|
||||
* a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Process locked */
|
||||
__HAL_LOCK(hdma);
|
||||
|
||||
if(HAL_DMA_STATE_READY == hdma->State)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_DMA_XFER_CPLT_CB_ID:
|
||||
hdma->XferCpltCallback = NULL;
|
||||
break;
|
||||
|
||||
case HAL_DMA_XFER_HALFCPLT_CB_ID:
|
||||
hdma->XferHalfCpltCallback = NULL;
|
||||
break;
|
||||
|
||||
case HAL_DMA_XFER_ERROR_CB_ID:
|
||||
hdma->XferErrorCallback = NULL;
|
||||
break;
|
||||
|
||||
case HAL_DMA_XFER_ABORT_CB_ID:
|
||||
hdma->XferAbortCallback = NULL;
|
||||
break;
|
||||
|
||||
case HAL_DMA_XFER_ALL_CB_ID:
|
||||
hdma->XferCpltCallback = NULL;
|
||||
hdma->XferHalfCpltCallback = NULL;
|
||||
hdma->XferErrorCallback = NULL;
|
||||
hdma->XferAbortCallback = NULL;
|
||||
break;
|
||||
|
||||
default:
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Release Lock */
|
||||
__HAL_UNLOCK(hdma);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DMA_Exported_Functions_Group3 Peripheral State functions
|
||||
* @brief Peripheral State functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### State and Errors functions #####
|
||||
===============================================================================
|
||||
[..]
|
||||
This subsection provides functions allowing to
|
||||
(+) Check the DMA state
|
||||
(+) Get error code
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Returns the DMA state.
|
||||
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA Channel.
|
||||
* @retval HAL state
|
||||
*/
|
||||
HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
return hdma->State;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the DMA error code
|
||||
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA Channel.
|
||||
* @retval DMA Error Code
|
||||
*/
|
||||
uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
return hdma->ErrorCode;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup DMA_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Set the DMA Transfer parameters.
|
||||
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA Channel.
|
||||
* @param SrcAddress The source memory Buffer address
|
||||
* @param DstAddress The destination memory Buffer address
|
||||
* @param DataLength The length of data to be transferred from source to destination
|
||||
* @retval HAL status
|
||||
*/
|
||||
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
|
||||
{
|
||||
/* Clear all flags */
|
||||
hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex);
|
||||
|
||||
/* Configure DMA Channel data length */
|
||||
hdma->Instance->CNDTR = DataLength;
|
||||
|
||||
/* Memory to Peripheral */
|
||||
if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
|
||||
{
|
||||
/* Configure DMA Channel destination address */
|
||||
hdma->Instance->CPAR = DstAddress;
|
||||
|
||||
/* Configure DMA Channel source address */
|
||||
hdma->Instance->CMAR = SrcAddress;
|
||||
}
|
||||
/* Peripheral to Memory */
|
||||
else
|
||||
{
|
||||
/* Configure DMA Channel source address */
|
||||
hdma->Instance->CPAR = SrcAddress;
|
||||
|
||||
/* Configure DMA Channel destination address */
|
||||
hdma->Instance->CMAR = DstAddress;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief set the DMA base address and channel index depending on DMA instance
|
||||
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA Stream.
|
||||
* @retval None
|
||||
*/
|
||||
static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
#if defined (DMA2)
|
||||
/* calculation of the channel index */
|
||||
if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
|
||||
{
|
||||
/* DMA1 */
|
||||
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U;
|
||||
hdma->DmaBaseAddress = DMA1;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* DMA2 */
|
||||
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2U;
|
||||
hdma->DmaBaseAddress = DMA2;
|
||||
}
|
||||
#else
|
||||
/* calculation of the channel index */
|
||||
/* DMA1 */
|
||||
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U;
|
||||
hdma->DmaBaseAddress = DMA1;
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
Loading…
Add table
Add a link
Reference in a new issue