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stm32: Add stm32h7 SPI support (#4850)
Signed-off-by: Aaron DeLyser <bluwolf@gmail.com>
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3 changed files with 159 additions and 3 deletions
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@ -5,7 +5,7 @@
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// This file may be distributed under the terms of the GNU GPLv3 license.
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// USB and I2C is not supported, SPI is untested!
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// I2C is not supported
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#include "autoconf.h" // CONFIG_CLOCK_REF_FREQ
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#include "board/armcm_boot.h" // VectorTable
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@ -170,7 +170,10 @@ clock_setup(void)
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MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLL1RGE_Msk, RCC_PLLCFGR_PLL1RGE_2);
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// Disable unused PLL1 outputs
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MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_DIVR1EN_Msk, 0);
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MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_DIVQ1EN_Msk, 0);
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// Enable PLL1Q and set to 100MHz for SPI 1,2,3
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MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_DIVQ1EN, RCC_PLLCFGR_DIVQ1EN);
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MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_Q1,
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(pll_freq / FREQ_PERIPH - 1) << RCC_PLL1DIVR_Q1_Pos);
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// This is necessary, default is not 1!
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MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_DIVP1EN_Msk, RCC_PLLCFGR_DIVP1EN);
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// Set multiplier DIVN1 and post divider DIVP1
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@ -184,6 +187,7 @@ clock_setup(void)
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MODIFY_REG(PWR->D3CR, PWR_D3CR_VOS_Msk, PWR_D3CR_VOS);
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while (!(PWR->D3CR & PWR_D3CR_VOSRDY))
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;
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// Enable VOS0 (overdrive)
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if (CONFIG_CLOCK_FREQ > 400000000) {
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RCC->APB4ENR |= RCC_APB4ENR_SYSCFGEN;
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