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Makefile: Reduce use of $^ in build rules

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It's rare to use all of a target's prerequisites in a recipe - replace
most cases with $< (the target's first prerequisite).

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor 2019-03-02 12:01:44 -05:00
parent 9430fea2c5
commit 399d539969
5 changed files with 9 additions and 9 deletions
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4
src/avr/Makefile
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@ -29,6 +29,6 @@ $(OUT)klipper.elf.hex: $(OUT)klipper.elf
$(Q)$(OBJCOPY) -j .text -j .data -O ihex $< $@
flash: $(OUT)klipper.elf.hex
@echo " Flashing $^ to $(FLASH_DEVICE) via avrdude"
@echo " Flashing $< to $(FLASH_DEVICE) via avrdude"
$(Q)if [ -z $(FLASH_DEVICE) ]; then echo "Please specify FLASH_DEVICE"; exit 1; fi
$(Q)avrdude -p$(CONFIG_MCU) -c$(CONFIG_AVRDUDE_PROTOCOL) -P"$(FLASH_DEVICE)" -D -U"flash:w:$(OUT)klipper.elf.hex:i"
$(Q)avrdude -p$(CONFIG_MCU) -c$(CONFIG_AVRDUDE_PROTOCOL) -P"$(FLASH_DEVICE)" -D -U"flash:w:$(<):i"