diff --git a/src/avr/Kconfig b/src/avr/Kconfig
index d4d78d279..3356ab5d6 100644
--- a/src/avr/Kconfig
+++ b/src/avr/Kconfig
@@ -11,7 +11,7 @@ config AVR_SELECT
     select HAVE_GPIO_I2C
     select HAVE_GPIO_HARD_PWM
     select HAVE_STRICT_TIMING
-    select HAVE_LIMITED_CODE_SIZE if MACH_atmega168 || MACH_atmega328 || MACH_atmega328p || MACH_atmega32u4
+    select HAVE_LIMITED_CODE_SIZE if MACH_atmega168 || MACH_atmega328 || MACH_atmega328p || MACH_atmega32u4 || MACH_lgt8f328p
 
 config BOARD_DIRECTORY
     string
@@ -39,6 +39,8 @@ choice
         bool "atmega328"
     config MACH_atmega168
         bool "atmega168"
+    config MACH_lgt8f328p
+        bool "lgt8f328p"
 endchoice
 
 config MCU
@@ -53,6 +55,7 @@ config MCU
     default "atmega32u4" if MACH_atmega32u4
     default "atmega1280" if MACH_atmega1280
     default "atmega2560" if MACH_atmega2560
+    default "atmega328p" if MACH_lgt8f328p
 
 config AVRDUDE_PROTOCOL
     string
@@ -62,6 +65,9 @@ config AVRDUDE_PROTOCOL
 
 choice
     prompt "Processor speed" if LOW_LEVEL_OPTIONS
+    config AVR_FREQ_32000000
+        bool "32Mhz"
+        depends on MACH_lgt8f328p
     config AVR_FREQ_16000000
         bool "16Mhz"
     config AVR_FREQ_20000000
@@ -75,11 +81,12 @@ config CLOCK_FREQ
     int
     default 8000000 if AVR_FREQ_8000000
     default 20000000 if AVR_FREQ_20000000
+    default 32000000 if AVR_FREQ_32000000
     default 16000000
 
 config CLEAR_PRESCALER
     bool "Manually clear the CPU prescaler field at startup" if LOW_LEVEL_OPTIONS
-    depends on MACH_at90usb1286 || MACH_at90usb646 || MACH_atmega32u4
+    depends on MACH_at90usb1286 || MACH_at90usb646 || MACH_atmega32u4 || MACH_lgt8f328p
     default y
     help
          Some AVR chips ship with a "clock prescaler" that causes the
diff --git a/src/avr/adc.c b/src/avr/adc.c
index 1d16368d0..99fd063f6 100644
--- a/src/avr/adc.c
+++ b/src/avr/adc.c
@@ -30,6 +30,10 @@ static const uint8_t adc_pins[] PROGMEM = {
     GPIO('F', 4), GPIO('F', 5), GPIO('F', 6), GPIO('F', 7),
     GPIO('K', 0), GPIO('K', 1), GPIO('K', 2), GPIO('K', 3),
     GPIO('K', 4), GPIO('K', 5), GPIO('K', 6), GPIO('K', 7),
+#elif CONFIG_MACH_lgt8f328p
+    GPIO('C', 0), GPIO('C', 1), GPIO('C', 2), GPIO('C', 3),
+    GPIO('C', 4), GPIO('C', 5), GPIO('E', 1), GPIO('E', 3),
+    GPIO('C', 7), GPIO('F', 0), GPIO('E', 6), GPIO('E', 7),
 #endif
 };
 
@@ -41,7 +45,11 @@ DECL_ENUMERATION_RANGE("pin", "PE2", GPIO('E', 2), 2);
 enum { ADMUX_DEFAULT = 0x40 };
 enum { ADC_ENABLE = (1<<ADPS0)|(1<<ADPS1)|(1<<ADPS2)|(1<<ADEN)|(1<<ADIF) };
 
+#if CONFIG_MACH_lgt8f328p
+DECL_CONSTANT("ADC_MAX", 4095);
+#else
 DECL_CONSTANT("ADC_MAX", 1023);
+#endif
 
 struct gpio_adc
 gpio_adc_setup(uint8_t pin)
@@ -59,10 +67,27 @@ gpio_adc_setup(uint8_t pin)
     ADCSRA = ADC_ENABLE;
 
     // Disable digital input for this pin
-#ifdef DIDR2
+#if defined(DIDR2)
     if (chan >= 8)
         DIDR2 |= 1 << (chan & 0x07);
     else
+#elif CONFIG_MACH_lgt8f328p
+    if (chan >= 8)
+        switch (chan) {
+        case 8:
+            DIDR1 |= (1 << 2);
+            break;
+        case 9:
+            DIDR1 |= (1 << 3);
+            break;
+        case 10:
+            DIDR1 |= (1 << 6);
+            break;
+        case 11:
+            DIDR1 |= (1 << 7);
+            break;
+        }
+    else
 #endif
         DIDR0 |= 1 << chan;
 
diff --git a/src/avr/gpio.c b/src/avr/gpio.c
index f52251770..6164a49d5 100644
--- a/src/avr/gpio.c
+++ b/src/avr/gpio.c
@@ -20,6 +20,9 @@ DECL_ENUMERATION_RANGE("pin", "PC0", GPIO('C', 0), 8);
 DECL_ENUMERATION_RANGE("pin", "PD0", GPIO('D', 0), 8);
 #if CONFIG_MACH_atmega328p
 DECL_ENUMERATION_RANGE("pin", "PE0", GPIO('E', 0), 8);
+#elif CONFIG_MACH_lgt8f328p
+DECL_ENUMERATION_RANGE("pin", "PE0", GPIO('E', 0), 8);
+DECL_ENUMERATION_RANGE("pin", "PF0", GPIO('F', 0), 8);
 #endif
 #ifdef PINE
 DECL_ENUMERATION_RANGE("pin", "PE0", GPIO('E', 0), 8);
@@ -42,6 +45,9 @@ volatile uint8_t * const digital_regs[] PROGMEM = {
     &PINB, &PINC, &PIND,
 #if CONFIG_MACH_atmega328p
     &_SFR_IO8(0x0C), // PINE on atmega328pb
+#elif CONFIG_MACH_lgt8f328p
+    &_SFR_IO8(0x0C), // lgt8f328p have PINE and PINF
+    &_SFR_IO8(0x12)
 #endif
 #ifdef PINE
     &PINE, &PINF,
diff --git a/src/avr/hard_pwm.c b/src/avr/hard_pwm.c
index 01d0bd9e6..d7cf4c015 100644
--- a/src/avr/hard_pwm.c
+++ b/src/avr/hard_pwm.c
@@ -22,7 +22,8 @@ struct gpio_pwm_info {
 enum { GP_8BIT=1, GP_AFMT=2 };
 
 static const struct gpio_pwm_info pwm_regs[] PROGMEM = {
-#if CONFIG_MACH_atmega168 || CONFIG_MACH_atmega328 || CONFIG_MACH_atmega328p
+#if CONFIG_MACH_atmega168 || CONFIG_MACH_atmega328 \
+      || CONFIG_MACH_atmega328p || CONFIG_MACH_lgt8f328p
     { GPIO('D', 6), &OCR0A, &TCCR0A, &TCCR0B, 1<<COM0A1, GP_8BIT },
     { GPIO('D', 5), &OCR0B, &TCCR0A, &TCCR0B, 1<<COM0B1, GP_8BIT },
     { GPIO('B', 1), &OCR1A, &TCCR1A, &TCCR1B, 1<<COM1A1, 0 },
diff --git a/src/avr/i2c.c b/src/avr/i2c.c
index e8febfba9..82238dfe9 100644
--- a/src/avr/i2c.c
+++ b/src/avr/i2c.c
@@ -15,7 +15,8 @@
 
 DECL_ENUMERATION("i2c_bus", "twi", 0);
 
-#if CONFIG_MACH_atmega168 || CONFIG_MACH_atmega328 || CONFIG_MACH_atmega328p
+#if CONFIG_MACH_atmega168 || CONFIG_MACH_atmega328 \
+      || CONFIG_MACH_atmega328p || CONFIG_MACH_lgt8f328p
 static const uint8_t SCL = GPIO('C', 5), SDA = GPIO('C', 4);
 DECL_CONSTANT_STR("BUS_PINS_twi", "PC5,PC4");
 #elif CONFIG_MACH_atmega644p || CONFIG_MACH_atmega1284p
diff --git a/src/avr/main.c b/src/avr/main.c
index 0523af411..f726b6920 100644
--- a/src/avr/main.c
+++ b/src/avr/main.c
@@ -12,8 +12,11 @@
 #include "irq.h" // irq_enable
 #include "sched.h" // sched_main
 
+#if CONFIG_MACH_lgt8f328p
+DECL_CONSTANT_STR("MCU", "lgt8f328p");
+#else
 DECL_CONSTANT_STR("MCU", CONFIG_MCU);
-
+#endif
 
 /****************************************************************
  * Dynamic memory
diff --git a/src/avr/spi.c b/src/avr/spi.c
index d89e94b1e..55eb1f58c 100644
--- a/src/avr/spi.c
+++ b/src/avr/spi.c
@@ -13,7 +13,8 @@
 
 DECL_ENUMERATION("spi_bus", "spi", 0);
 
-#if CONFIG_MACH_atmega168 || CONFIG_MACH_atmega328 || CONFIG_MACH_atmega328p
+#if CONFIG_MACH_atmega168 || CONFIG_MACH_atmega328 \
+      || CONFIG_MACH_atmega328p || CONFIG_MACH_lgt8f328p
 static const uint8_t MISO = GPIO('B', 4), MOSI = GPIO('B', 3);
 static const uint8_t SCK = GPIO('B', 5), SS = GPIO('B', 2);
 DECL_CONSTANT_STR("BUS_PINS_spi", "PB4,PB3,PB5");
diff --git a/test/configs/lgt8f328p.config b/test/configs/lgt8f328p.config
new file mode 100644
index 000000000..dd7a21428
--- /dev/null
+++ b/test/configs/lgt8f328p.config
@@ -0,0 +1,15 @@
+# Base config file for lgt8f328p
+CONFIG_MACH_AVR=y
+CONFIG_MACH_lgt8f328p=y
+CONFIG_CLOCK_FREQ=32000000
+CONFIG_WANT_ADC=n
+CONFIG_WANT_SPI=n
+CONFIG_WANT_I2C=n
+CONFIG_WANT_HARD_PWM=n
+CONFIG_WANT_BUTTONS=n
+CONFIG_WANT_TMCUART=n
+CONFIG_WANT_NEOPIXEL=n
+CONFIG_WANT_PULSE_COUNTER=n
+CONFIG_WANT_ST7920=n
+CONFIG_WANT_HD44780=n
+CONFIG_WANT_HX71X=n