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rp2040: Prefer larger postdiv1 on rp2040 chips
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The rp2040 uses a pll vco divider of 6.  Prefer setting postdiv1=6 and
postdiv2=1 (instead of the previous postdiv1=3 and postdiv2=2).

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor 2025-06-02 14:10:42 -04:00
parent aa3388cc59
commit 14cbb8dd2d
1 changed files with 2 additions and 2 deletions
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4
src/rp2040/main.c
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@ -113,8 +113,8 @@ static void
pll_setup(pll_hw_t *pll, uint32_t mul, uint32_t postdiv)
{
// Setup pll
uint32_t refdiv = 1, fbdiv = mul, postdiv2 = 2, postdiv1 = postdiv/postdiv2;
if (postdiv1 > 0x07) {
uint32_t refdiv = 1, fbdiv = mul, postdiv2 = 1, postdiv1 = postdiv;
while (postdiv1 > 0x07) {
postdiv1 >>= 1;
postdiv2 <<= 1;
}